MSR Decoding Chip with 20 Pins for Smart Card Reader

 Track

    Single Track

 Pins

    20 pins

  Description

   The M3-2100G F/2F decoder integrated circuit is designed     for use in magnetic strip card reader system.

   The F/2F read/decoder IC will recover clock and data              signals from an F/2F data stream generated from a     

    magnetic head.

    M3-2100G will function for data rates from 300 to 15,000     

    bits per second. Acquisition and tracking of the data within        this range is automatically.

  Major blocks - Amplify block

    This block amplifies and filters the signal read from the            magnetic reader head, rejects common mode noise and

     detects signal peaks. It also includes protection circuit to   

     protect the component.

    And latches onto the data rate and performs the recovery  

    of individual bits from the F/2F data stream.

  Major blocks - Control block

   The enable and disable counters provide initialization for         the recovery block.

   These counters initialize both bit recovery and the signal         conditioning and detection block.